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NXP Semiconductors /MIMXRT1052 /ROMC /ROMPATCH0A

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Interpret as ROMPATCH0A

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (THUMBX_0)THUMBX 0ADDRX

THUMBX=THUMBX_0

Description

ROMC Address Registers

Fields

THUMBX

THUMB Comparator Select - Indicates that this address will trigger a THUMB opcode patch or an Arm opcode patch

0 (THUMBX_0): Arm patch

1 (THUMBX_1): THUMB patch (ignore if data fix)
ADDRX

Address Comparator Registers - Indicates the memory address to be watched

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data